coreboot/src/cpu
Lee Leahy abc216822d UPSTREAM: cpu/x86: Support CPUs without rdmsr/wrmsr instructions
Quark does not support the rdmsr and wrmsr instructions.  In this case
use a SOC specific routine to support the setting of the MTRRs.  Migrate
the code from FSP 1.1 to be x86 CPU common.

Since all rdmsr/wrmsr accesses are being converted, fix the build
failure for quark in lib/reg_script.c.  Move the soc_msr_x routines and
their depencies from romstage/mtrr.c to reg_access.c.

TEST=Build and run on Galileo Gen2

BUG=None
BRANCH=None

Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15839
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Ibc68e696d8066fbe2322f446d8c983d3f86052ea
Reviewed-on: https://chromium-review.googlesource.com/363935
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-07-28 22:56:04 -07:00
..
allwinner drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
amd UPSTREAM: AMD k8 fam10: Fix CAR GLOBALS late in romstage 2016-07-21 11:22:12 -07:00
armltd vboot2: add verstage 2015-01-27 01:41:40 +01:00
dmp x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files 2015-12-30 18:34:08 +01:00
intel UPSTREAM: intel car: Use MTRR WRPROT type for XIP cache 2016-07-26 12:27:12 -07:00
qemu-power8 cpu/qemu-power8: don't enable it for qemu-x86 2016-02-19 20:03:52 +01:00
qemu-x86 qemu-x86: Enable SMP support 2015-12-08 15:54:27 +01:00
ti UPSTREAM: region: Add writeat and eraseat support 2016-06-27 17:13:18 -07:00
via UPSTREAM: Ignore RAMTOP for MTRRs 2016-06-22 10:41:48 -07:00
x86 UPSTREAM: cpu/x86: Support CPUs without rdmsr/wrmsr instructions 2016-07-28 22:56:04 -07:00
Kconfig cpu: Add a way to use microcode .h files back to the build 2015-11-10 19:22:40 +01:00
Makefile.inc cpu: Add a way to use microcode .h files back to the build 2015-11-10 19:22:40 +01:00