The Zynq 7000 family of SoCs integrates up to two Cortex-A9 processor
cores with FPGA fabric using Xilinx's 7-series architecture. This commit
adds the bare minimum support code to compile a rom successfully when
the SoC is selected by a board. This code was loosely based on the TI
AM335x code, especially the memlayout.ld file.
In its current state valid Zynq boot images cannot be produced. CBFS
media is not yet supported so only the bootblock is able to run. The
easiest way to run this code is to manually load the bootblock ELF into
memory over JTAG using OpenOCD.
Change-Id: I45aa4e3a11074fa447d4008ac3c96d44f891831c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: coreboot org <coreboot.org@gmail.com>
1212b774b2