coreboot/mainboard/amd
Ronald G. Minnich b73481741f This is getting to the link phase. Still won't build as we don't have
dqs timing file compiled in yet. 

Per discussion with YingHai Lu, we are only going to support F2 and 
later CPUs. This will simplify more code. 

I realize this code needs work, but it is in v2, and cleanup will get 
easier once we have the baseline. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@804 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-22 16:48:44 +00:00
..
db800 Change v3 makefile rules to be source-based, part I. 2008-08-18 11:15:43 +00:00
norwich Change v3 makefile rules to be source-based, part I. 2008-08-18 11:15:43 +00:00
serengeti This is getting to the link phase. Still won't build as we don't have 2008-08-22 16:48:44 +00:00
Kconfig Add ddr2 defines. 2008-08-21 16:04:41 +00:00