coreboot/src/soc
Duncan Laurie aab226cc83 soc/intel/tigerlake: Increase heap size
With SoundWire and USB4 enabled some boards are running out of
memory with all of the ACPI devices and properties.  Increase
the heap size to accommodate.

BUG=b:147462631
TEST=Successfully boot on volteer SKU5 board with SoundWire enabled,
before boot was failing with "Error! memalign: Out of memory"

Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I0245bdfad93b381871514578e66640e7fe6fa5c4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
2020-06-09 16:29:23 +00:00
..
amd soc/amd/picasso: solve MTRRs only from 4GiB and below 2020-06-08 19:08:11 +00:00
cavium src: Remove redundant includes 2020-06-02 07:42:32 +00:00
intel soc/intel/tigerlake: Increase heap size 2020-06-09 16:29:23 +00:00
mediatek src: Remove redundant includes 2020-06-02 07:42:32 +00:00
nvidia src: Remove redundant includes 2020-06-02 07:42:32 +00:00
qualcomm src: Remove unused '#include <timer.h>' 2020-06-02 07:39:05 +00:00
rockchip src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
samsung samsung/exynos5420: add resources during read_resources() 2020-05-14 21:27:34 +00:00
sifive soc/sifive/fu540: Add chip_operations stub 2020-05-28 09:30:51 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00