Elyes HAOUAS f6bbc603fa intel: Use MSR_EBC_FREQUENCY_ID instead of 0x2c ... Change-Id: Ib1b761fc417f1bb000f408d3bed5e8666963f51d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/22603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Martin Roth <martinroth@google.com>		2017-12-11 01:10:51 +00:00
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hyperthreading.h	Intel CPUs: execute microcode update only once per core	2012-07-02 15:49:07 +02:00
l2_cache.h	src/include: Wrap lines at 80 columns	2017-03-13 17:23:37 +01:00
microcode.h	cpu/intel/microcode: allow microcode to be loaded in romstage	2016-02-10 18:08:28 +01:00
reset.h	soc/intel/common/block: Common ACPI	2017-09-08 19:01:04 +00:00
romstage.h	src/include: Move storage class to beginning of declaration	2017-03-13 17:19:45 +01:00
speedstep.h	intel: Use MSR_EBC_FREQUENCY_ID instead of 0x2c	2017-12-11 01:10:51 +00:00
turbo.h	cpu/intel/turbo: Add option to disable turbo	2017-05-16 17:43:28 +02:00