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Matt DeVillier aa3b5e29f2 soc/braswell: hook up smmstore 
Adapted from implementation in sb/intel/common.

Test: build/boot variants of google/cyan with Tianocore
and SMMSTORE enabled

Change-Id: Ife4681983d0eecbc01c539b477664f3dd8bb9368
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-03-03 10:11:55 +00:00
..
acpi src/acpi: Update license headers to SPDX 2020-01-02 14:49:00 +00:00
arch x86/acpi_s3: Remove trailing dots from debug message 2020-03-02 15:08:52 +00:00
commonlib lz4: Fix out-of-bounds reads 2020-03-02 15:03:03 +00:00
console console/post: NOPOST means NOPOST 2020-01-18 10:53:08 +00:00
cpu cpu/intel/slot_1: Cache romstage XIP execution 2020-03-03 07:41:40 +00:00
device device/Kconfig: select linear framebuffer for Tianocore 2020-02-24 13:10:47 +00:00
drivers drivers/i2c/at24rf08c: Format according to coding style 2020-03-02 11:46:29 +00:00
ec ec/google/chromeec: Introduce SKU_ID helpers 2020-02-28 00:02:35 +00:00
include soc/intel/denverton: Move PCI IDs to pci_ids.h 2020-03-02 19:13:10 +00:00
lib lib/lzma: Fix out-of-bounds read 2020-02-25 10:13:51 +00:00
mainboard LGA1155 mainboards: Remove gfx.did and gfx.ndid 2020-03-03 10:11:02 +00:00
northbridge nb/intel/sandybridge: Fix VBOOT 2020-03-02 11:49:03 +00:00
security treewide: Capitalize 'CMOS' 2020-02-24 14:10:00 +00:00
soc soc/braswell: hook up smmstore 2020-03-03 10:11:55 +00:00
southbridge i82371eb: Roll 82093aa init into isa_init() 2020-03-03 07:43:08 +00:00
superio superio/nuvoton/npcd378: Switch to superio/common 2020-03-02 10:19:44 +00:00
vendorcode vendorcode/intel/fsp/fsp2_0: Add FSP header files for Skylake-SP 2020-03-02 11:44:47 +00:00
Kconfig Kconfig: Have GDB_STUB depend on DRIVERS_UART 2020-03-03 07:45:23 +00:00