coreboot/src
Duncan Laurie 2d9d39a704 lynxpoint: Enable USB clock gating, late setup, and sleep prep
Both EHCI and XHCI controllers have additional setup steps
that are not part of the PEI reference code so they need to
be done later.

Both controllers also have specific clock gating setup
requirements that are now implemented.

Additionally they both have specific requirements when entering
sleep states.  XHCI needs something in S3/S4/S5 and EHCI only
has steps for S4/S5 entry.

Change-Id: Ic62cbc8b6255455e56b72dd5d52e27a311999330
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57033
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4217
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:55:15 +01:00
..
arch x86: fix compile error for !CONFIG_MULTIBOOT 2013-11-25 23:40:46 +01:00
console console: Add hexdump32 function 2013-11-10 14:12:31 +01:00
cpu haswell: check for clean reset 2013-11-25 23:55:00 +01:00
device x86: use proper types for interrupt callbacks 2013-11-25 23:05:09 +01:00
drivers RTC: Skip rtc_init() in S3 resume path 2013-11-25 23:41:23 +01:00
ec Add declaration of dock registers 1, 2 and 3. 2013-11-25 07:00:11 +01:00
include smbios: Add generic type41 write function 2013-11-25 23:38:21 +01:00
lib lib/coreboot_table: set type and size of framebuffer tag after fill_lb_framebuffer 2013-11-23 18:40:40 +01:00
mainboard peppy: Add Elipda DIMM SPD 2013-11-25 23:49:00 +01:00
northbridge haswell: Add magic to turn on grahpics in normal mode 2013-11-25 23:47:54 +01:00
southbridge lynxpoint: Enable USB clock gating, late setup, and sleep prep 2013-11-25 23:55:15 +01:00
superio sio1007: Properly build '.c' files 2013-11-10 14:19:28 +01:00
vendorcode slippy: Minor vboot related fixes 2013-11-25 23:27:53 +01:00
Kconfig Add GRUB2 payload to build system 2013-11-19 01:07:25 +01:00