coreboot/src/soc
Marshall Dawson a89d19a980 amd/stoneyridge: Add BIOS RAM R/W functions
The internal FCH contains 256 bytes of "BiosRam" that maintains its
state until RSMRST# is asserted or standby power is lost.  Add functions
to support read and write operations.

Change-Id: I2ddf58a63e69b2775de9a8163534b13dad2ea2fe
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2018-01-19 19:49:19 +00:00
..
amd amd/stoneyridge: Add BIOS RAM R/W functions 2018-01-19 19:49:19 +00:00
broadcom soc: Add Kconfig for each soc vendor 2017-10-23 17:18:32 +00:00
dmp DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT 2018-01-15 23:23:17 +00:00
imgtec soc: Add Kconfig for each soc vendor 2017-10-23 17:18:32 +00:00
intel security/tpm: Change TPM naming for different layers. 2018-01-18 01:45:35 +00:00
lowrisc RISC-V boards: Stop using the config string 2017-11-07 12:31:00 +00:00
marvell soc: Add Kconfig for each soc vendor 2017-10-23 17:18:32 +00:00
mediatek soc/mediatek/mt8173: Remove cast of NULL* to void * 2017-11-03 16:03:30 +00:00
nvidia soc: Add Kconfig for each soc vendor 2017-10-23 17:18:32 +00:00
qualcomm soc: Add Kconfig for each soc vendor 2017-10-23 17:18:32 +00:00
rockchip soc/rockchip/rk3399: Ensure full eDP init sequence 2018-01-10 20:57:17 +00:00
samsung soc: Add Kconfig for each soc vendor 2017-10-23 17:18:32 +00:00
ucb riscv: Remove config string support 2017-12-02 05:25:00 +00:00