Tim Wawrzynczak a7b60e7dc8 soc/intel/tigerlake: Check TBT & TCSS ports for wake events ... Wakes from TBT ports and TCSS devices will show up as PME_B0_STS wakes, so add checks for wakes from these devices in pch_log_pme_internal_wake_source. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ie9904c3c01ea85fcd83218fcfeaa4378b07c1463 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47396 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-12-10 17:47:03 +00:00
..
alderlake	soc/intel/common/dmi: Move DMI defines into DMI driver header	2020-12-09 14:23:15 +00:00
apollolake	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00
baytrail	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
braswell	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
broadwell	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
cannonlake	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00
common	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00
denverton_ns	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
elkhartlake	mb/intel/ehlcrb: Add EHL CRB memory initialization support	2020-12-10 10:49:15 +00:00
icelake	soc/intel/common/dmi: Move DMI defines into DMI driver header	2020-12-09 14:23:15 +00:00
jasperlake	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00
quark	cbfs: Introduce cbfs_ro_map() and cbfs_ro_load()	2020-12-03 00:00:19 +00:00
skylake	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00
tigerlake	soc/intel/tigerlake: Check TBT & TCSS ports for wake events	2020-12-10 17:47:03 +00:00
xeon_sp	soc/intel/xeon_sp/nvs: Use common global NVS	2020-12-10 17:33:34 +00:00
Kconfig