coreboot/src
Maulik V Vaghela a77eb6e6c3 mb/google/brya: Disable dynamic GPIO PM for community 3
We recently added GPIO definition for PCIE vGPIO for Alder Lake.
We also need to disable GPIO dynamic PM for this community which is
already done for other communities as well.

BUG=b:188392183
BRANCH=None
TEST=Code compiles and Check if dynamic PM for GPIO COMM3 is also
disabled

Change-Id: I2f8645b8f4a9995e727a7623af97531c5de52892
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54383
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-18 17:03:36 +00:00
..
acpi src/acpi: Add initial support for HMAT 2021-05-14 08:56:59 +00:00
arch option: Introduce CMOS_LAYOUT_FILE Kconfig symbol 2021-05-18 11:43:49 +00:00
commonlib commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
console src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
cpu cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
device device/device.c: Print bus numbers in decimal 2021-05-11 12:52:30 +00:00
drivers drivers/i2c/cs42l42: Make HS_BIAS_SENSE_EN optional 2021-05-12 08:00:12 +00:00
ec src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
include soc/intel/alderlake: Update CPU and IGD Device IDs 2021-05-14 09:03:01 +00:00
lib cbfs: Increase mcache size defaults 2021-05-14 00:35:46 +00:00
mainboard mb/google/brya: Disable dynamic GPIO PM for community 3 2021-05-18 17:03:36 +00:00
northbridge nb/intel/gm45: Guard even more macro parameters 2021-05-16 21:53:36 +00:00
security vboot/secdata_mock: Make v0 kernel secdata context 2021-05-18 15:30:47 +00:00
soc cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
southbridge sb/intel: Drop outdated SMBus I/O BAR comment 2021-05-16 22:09:14 +00:00
superio src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
vendorcode vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2162_00 2021-05-16 22:17:26 +00:00
Kconfig option: Introduce CMOS_LAYOUT_FILE Kconfig symbol 2021-05-18 11:43:49 +00:00