Xiang Wang 387417be03 riscv: add support to check ISA extension ... Add support to check ISA extension for RISC-V. Change-Id: I5982fb32ed1dd435059edc6aa0373bffa899e160 Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/27410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Hug <philipp@hug.cx>		2018-07-11 10:44:08 +00:00
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arm	src: Get rid of unneeded whitespace	2018-07-02 07:39:51 +00:00
arm64	src: Get rid of unneeded whitespace	2018-07-02 07:39:51 +00:00
mips	pci: Fix compilation on non x86	2018-05-14 13:53:30 +00:00
power8	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
riscv	riscv: add support to check ISA extension	2018-07-11 10:44:08 +00:00
x86	src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:26:18 +00:00