erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src
History
Timothy Pearson f1d807c5c6 nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_SW_Fam15() 
Change-Id: Ic3f636983cf6ba2796ee56e2a25b56513a4343c1
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14148
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-23 22:14:00 +01:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write 2016-03-23 21:12:31 +01:00
commonlib arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
console arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
cpu arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
device device: Add i2c read/write register field API 2016-03-21 23:10:55 +01:00
drivers parade/ps8640: Clean up 2016-03-16 15:02:46 +01:00
ec Hide EC_GOOGLE_CHROMEEC_SPI_BUS. 2016-03-05 00:57:22 +01:00
include arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
lib arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
mainboard soc/apollolake: Add skeleton ACPI entry 2016-03-21 23:14:09 +01:00
northbridge nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_SW_Fam15() 2016-03-23 22:14:00 +01:00
soc soc/intel/apollolake: utilize postcar phase/stage 2016-03-23 14:24:44 +01:00
southbridge southbridge/intel/ibexpeak: Use common gpio.c 2016-02-23 00:28:26 +01:00
superio roda/rk9: Remove #include early_serial.c from romstage 2016-03-08 13:41:03 +01:00
vendorcode vendorcode/intel/Kconfig: Add broadwell_de symbol to fix lint 2016-03-15 15:23:40 +01:00
Kconfig Kconfig: remove COMPRESS_PRERAM_STAGES option from x86 2016-03-11 16:52:38 +01:00