coreboot/src/vendorcode
Mariusz Szafranski a429761b7b vendorcode/intel/fsp/fsp2_0/denverton_ns: Add FSP header files for Denverton_NS SoC
This change adds the FSP header files for FSP version 2.0 (15D50)
for the Intel Denverton_NS SoC.

Change-Id: I9672610df09089c549e74072345781bea0b4d06f
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/20805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Reviewed-by: Brenton Dong <brenton.m.dong@intel.com>
2017-08-22 19:11:23 +00:00
..
amd AGESA f15tn: Fix MemContext buffer parser for AmdInitPost() 2017-08-16 22:06:57 +00:00
google Rename __attribute__((packed)) --> __packed 2017-07-13 19:45:59 +00:00
intel vendorcode/intel/fsp/fsp2_0/denverton_ns: Add FSP header files for Denverton_NS SoC 2017-08-22 19:11:23 +00:00
siemens vendorcode/siemens: Fix typo in hwilib 2017-07-28 16:16:05 +00:00
Makefile.inc vendorcode/siemens: Add hwilib for Siemens specific info struct 2016-04-28 08:15:47 +02:00