coreboot/src/soc/intel
Jingle Hsu a41b12cd7b xeon_sp/cpx: Enable ACPI P-state support
Implement ACPI P-state support to enable driver acpi_cpufreq.
This patch leverages code from the Skylake project.

Tested=On OCP Delta Lake
cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
1501000 1500000 1400000 1300000 1200000 1100000 1000000 900000 800000

Change-Id: I3bf3ad7f82fbf196a2134a8138b10176fc8be2cc
Signed-off-by: Jingle Hsu <jingle_hsu@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44404
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-18 08:48:04 +00:00
..
apollolake soc/intel/apollolake: Rename UART irqs 2020-08-10 10:45:46 +00:00
baytrail {sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code 2020-08-05 15:46:17 +00:00
braswell {sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code 2020-08-05 15:46:17 +00:00
broadwell soc/intel/broadwell/iobp: Log success in pch_iobp_write() 2020-08-07 11:57:32 +00:00
cannonlake soc/intel/cannonlake: Set FSP-M UPD Heci1BarAddress 2020-08-12 17:39:49 +00:00
common soc/intel/common: Add support for LPSS UART in ACPI mode 2020-08-18 05:53:43 +00:00
denverton_ns cpu,soc/intel: Drop select SMP 2020-07-26 20:59:52 +00:00
icelake soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming 2020-08-09 11:03:37 +00:00
jasperlake soc/intel/jasperlake: Configure IPU based on devicetree 2020-08-18 08:46:33 +00:00
quark src: Make HAVE_CF9_RESET set the FADT reset register 2020-07-20 13:23:13 +00:00
skylake soc/intel/skylake/acpi.c: Name devices on secondary bus 2020-08-17 07:12:46 +00:00
tigerlake soc/intel/tigerlake: Allow fine grained control of S0iX states 2020-08-17 07:11:19 +00:00
xeon_sp xeon_sp/cpx: Enable ACPI P-state support 2020-08-18 08:48:04 +00:00
Kconfig fsp2_0: Gather Kconfig declarations 2020-04-05 23:26:24 +00:00