Raul E Rangel a36f9ab041 soc/amd/common: Don't reserve VERSTAGE region when using PSP verstage ... The VERSTAGE region is only needed when running verstage in the x86. This change reduces the early ram size by 512 KiB when using PSP verstage. BUG=none TEST=Boot guybrush to OS Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I45ce421397807dbb1eb48aedd05209b91e89aa4f Reviewed-on: https://review.coreboot.org/c/coreboot/+/61190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2022-01-26 01:27:17 +00:00
..
acpi	src: Remove unused <stdbool>	2022-01-19 15:15:50 +00:00
arch	arch/riscv: Fix some SMP related headers	2022-01-19 19:29:42 +00:00
commonlib	commonlib: Add new "CSME ROM started execution" TS	2022-01-21 22:43:30 +00:00
console	lib/cbmem_console,console: Resurrect CONSOLE_CBMEM_DUMP_TO_UART	2022-01-25 16:13:39 +00:00
cpu
device	device: constify pciexp_find_extended_cap()	2022-01-24 17:28:39 +00:00
drivers	drivers/intel/fsp2_0: Make FSP Notify Phase APIs optional	2022-01-25 16:13:04 +00:00
ec	ec/google/chromeec: Add checks before creating Type C device	2022-01-25 03:52:00 +00:00
include	soc/intel/common: Include Alder Lake-N device IDs	2022-01-25 16:10:46 +00:00
lib	lib/cbmem_console,console: Resurrect CONSOLE_CBMEM_DUMP_TO_UART	2022-01-25 16:13:39 +00:00
mainboard	mb/google/guybrush/var/nipperkin: Add Board values for eDP tuning	2022-01-25 23:57:13 +00:00
northbridge	northbridge/intel/i945: Change types to uintptr_t where appropriate	2022-01-25 16:14:23 +00:00
security	console/cbmem_console: Rename cbmem_dump_console	2022-01-13 15:25:43 +00:00
soc	soc/amd/common: Don't reserve VERSTAGE region when using PSP verstage	2022-01-26 01:27:17 +00:00
southbridge	sb/intel/common/firmware: Reword me_cleaner warning	2022-01-17 17:14:20 +00:00
superio	superio/smsc/sch5545/superio.c: Include stdint.h and bsd/helpers.h	2022-01-10 23:28:32 +00:00
vendorcode	soc/amd/cezanne: FSP: Add UPD entry for eDP tuning	2022-01-25 23:57:06 +00:00
Kconfig