Angel Pons a3580e59be mb/hp/2670p: Transform into variant ... Tested with BUILD_TIMELESS=1, binary does not change. Change-Id: Idc4d0a3d7384ad4e5a3eb3d7ecefaa2f35093ac0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38091 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2020-01-20 09:00:41 +00:00
..
acpi	src/acpi: Update license headers to SPDX	2020-01-02 14:49:00 +00:00
arch	arch/x86/post.c: Hide cmos_post_code from SMM context	2020-01-18 10:57:59 +00:00
commonlib	include/commonlib: Fix typos	2020-01-10 15:26:03 +00:00
console	console/post: NOPOST means NOPOST	2020-01-18 10:53:08 +00:00
cpu	cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboard	2020-01-18 22:07:47 +00:00
device	src/device: Update pci_class to PCI-SIG Specification	2020-01-10 10:55:49 +00:00
drivers	drivers/spi/spi_flash: organize spi flash by sector topology	2020-01-17 05:49:09 +00:00
ec	ec/google/wilco: Set minimum UCSI_ACPI region length	2020-01-18 11:19:49 +00:00
include	soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs	2020-01-18 12:03:17 +00:00
lib	cbfs: Remove locator concept	2020-01-18 10:51:04 +00:00
mainboard	mb/hp/2670p: Transform into variant	2020-01-20 09:00:41 +00:00
northbridge	nb/intel/sandybridge: sort LANEBASE_* defines by their address	2020-01-16 08:40:10 +00:00
security	security/vboot: Allow UDC regardless of vboot state	2020-01-18 11:17:30 +00:00
soc	soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs	2020-01-18 12:03:17 +00:00
southbridge	sb/intel/i82371eb: Add PIIX4 definitions	2020-01-14 18:19:14 +00:00
superio	superio/nuvoton/nct5104d: Add soft reset GPIO functionality	2020-01-15 18:54:33 +00:00
vendorcode	vc/amd/agesa: Fix out of bounds read	2020-01-13 11:22:40 +00:00
Kconfig	timestamps: Fix TIMESTAMPS_ON_CONSOLE behaviour	2020-01-10 14:11:50 +00:00