Angel Pons a3495c0d7b soc/intel/tigerlake: Drop unreferenced devicetree settings ... No mainboard uses these settings, nor does SoC code. Drop them. Change-Id: I5f5da8dfcec7dd35981611830b555cab5d6af3e3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48572 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-12-14 08:19:01 +00:00
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amd	soc/amd/*/include/spc/gpio: fix pin numbers in comments	2020-12-13 22:18:50 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	x86: Add a minimal example SoC along with a board	2020-10-30 21:34:18 +00:00
intel	soc/intel/tigerlake: Drop unreferenced devicetree settings	2020-12-14 08:19:01 +00:00
mediatek	soc/mediatek/mt8192: Add ddp driver	2020-12-14 04:02:52 +00:00
nvidia	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
qualcomm	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
rockchip	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
samsung	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
sifive	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ti	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00