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Angel Pons a30641295a drivers/intel/fsp1_1: Drop weak function definition 
The only FSP 1.1 platform is Braswell, which has a non-weak definition
for the `soc_silicon_init_params` function. This changes the resulting
BUILD_TIMELESS=1 coreboot image for Facebook fbg1701, for some reason.

Change-Id: I2a1b51cda9eb21d7af8372c16a43195a4bdd9543
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54956
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-05-27 15:40:22 +00:00
..
acpi acpi: add SRAT Generic Initiator Affinity structure 2021-05-27 14:37:19 +00:00
arch option: Introduce CMOS_LAYOUT_FILE Kconfig symbol 2021-05-18 11:43:49 +00:00
commonlib
console
cpu cpu/amd/pi/00630F01: Remove unused directory and code 2021-05-27 11:50:08 +00:00
device device: Consider fw_config probing in is_dev_enabled() 2021-05-24 16:55:39 +00:00
drivers drivers/intel/fsp1_1: Drop weak function definition 2021-05-27 15:40:22 +00:00
ec ec/google/wilco/mailbox: Fix format warning by using size_t length modifier 2021-05-26 15:12:31 +00:00
include acpi: add SRAT Generic Initiator Affinity structure 2021-05-27 14:37:19 +00:00
lib fw_config: Add helper function fw_config_probe_dev 2021-05-24 16:55:27 +00:00
mainboard mb/google/mancomb: set PSPP policy to balanced 2021-05-27 15:39:40 +00:00
northbridge nb/amd/pi/00630F01: Remove unused directory and code 2021-05-27 11:48:19 +00:00
security Add Kconfig TPM 2021-05-26 12:31:10 +00:00
soc soc/amd/cezanne: add devicetree setting for PSPP policy 2021-05-27 15:39:08 +00:00
southbridge sb/intel/lynxpoint: Add pch_iobp_exec() function 2021-05-20 16:04:05 +00:00
superio
vendorcode vc/amd/pi/00630F01: Remove unused directory and code 2021-05-26 22:42:35 +00:00
Kconfig option: Introduce CMOS_LAYOUT_FILE Kconfig symbol 2021-05-18 11:43:49 +00:00