Subrata Banik a0d9ad322f soc/intel/skl: Replace dt HeciEnabled by HECI1 disable config ... List of changes: 1. Drop `HeciEnabled` from dt and dt chip configuration. 2. Replace all logic that disables HECI1 based on the `HeciEnabled` chip config with `DISABLE_HECI1_AT_PRE_BOOT` config. 3. Make dt CSE PCI device `on` by default. 4. Mainboards set DISABLE_HECI1_AT_PRE_BOOT=y to make Heci1 function disable at pre-boot instead of the dt policy that uses `HeciEnabled = 0`. Mainboards that choose to make HECI1 enable during boot don't override `heci1 disable` config. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I5c13fe4a78be44403a81c28b1676aecc26c58607 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2022-01-16 13:33:14 +00:00
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amd	soc/amd/cezanne: factor out eSPI SPI2 pads configuration functions	2022-01-14 00:29:52 +00:00
cavium	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
example	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
intel	soc/intel/skl: Replace dt HeciEnabled by HECI1 disable config	2022-01-16 13:33:14 +00:00
mediatek	soc/mediatek: Fix include guard naming for emi.h	2022-01-13 15:26:54 +00:00
nvidia
qualcomm	sc7180: Update video mode active horizontal/vertical/total calculations	2022-01-12 17:35:21 +00:00
rockchip
samsung
sifive
ti
ucb