coreboot/src/soc
Jonathan Neuschäfer a09c2e1624 soc/sifive/fu540: Load PLL settings from a struct
The different PLLs in the fu540 use the same register layout, so use one
function (configure_pll) to program a PLL and wait for it to lock. This
also makes it possible to dynamically calculate the PLL settings later.

TEST=Boot until "Payload not loaded" on HiFive Unleashed

Change-Id: I5c0cee886bad5758c70f967d2bb998c1e1a736ab
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29356
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-04 10:15:00 +00:00
..
amd soc/amd/stoneyridge: Use new ACPI MMIO functions 2018-12-03 13:21:35 +00:00
cavium (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
imgtec (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
intel soc/intel/apl: Enable graphics with libgfxinit 2018-12-03 14:47:50 +00:00
mediatek mediatek/mt8183: Add DDR driver of rx dqs gating calibration part 2018-11-29 13:35:38 +00:00
nvidia security/vboot: Fix remaining measured boot issues 2018-11-30 10:26:56 +00:00
qualcomm sdm845: Add clock support 2018-11-30 21:12:30 +00:00
rockchip security/vboot: Fix remaining measured boot issues 2018-11-30 10:26:56 +00:00
samsung src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
sifive soc/sifive/fu540: Load PLL settings from a struct 2018-12-04 10:15:00 +00:00
ucb riscv: add support smp_pause / smp_resume 2018-11-05 09:03:40 +00:00