coreboot/src/mainboard/google
William wu 9f470b1930 google/gru: Tune USB 2.0 PHY to increase compatibility
When testing USB 2.0 compatibility with different kinds
of USB 2.0 devices on Kevin board, we find that some
USB HDDs (e.g. seagate SRD00F1 1TB HDD) and some smart
phones (e.g. galaxy A5 smart phone) can't be detected.
And according to the error log, this issue is related
to USB 2.0 PHY signal problem.

For the USB HDD, error log is:
[  592.557724] usb 5-1: new high-speed USB device number 2 using xhci-hcd
[  592.847735] usb 5-1: new high-speed USB device number 3 using xhci-hcd
[  593.473720] usb 5-1: new high-speed USB device number 6 using xhci-hcd
[  594.187717] usb 5-1: new high-speed USB device number 9 using xhci-hcd
[  595.020717] usb 5-1: new high-speed USB device number 13 using xhci-hcd
[  595.284730] usb 5-1: new high-speed USB device number 14 using xhci-hcd
[  595.574816] usb 5-1: new high-speed USB device number 15 using xhci-hcd

The log shows that HDD failed to high-speed handshake.

For the smart phone, error log is:
[ 1145.661625] usb 5-1: new high-speed USB device number 2 using xhci-hcd
[ 1145.771674] usb 5-1: device descriptor read/64, error -71
[ 1145.979752] usb 5-1: device descriptor read/64, error -71
[ 1146.187721] usb 5-1: new high-speed USB device number 3 using xhci-hcd
[ 1146.301754] usb 5-1: device descriptor read/64, error -71
[ 1146.509750] usb 5-1: device descriptor read/64, error -71
[ 1146.717722] usb 5-1: new high-speed USB device number 4 using xhci-hcd
[ 1146.724393] usb 5-1: Device not responding to setup address.
[ 1146.930795] usb 5-1: Device not responding to setup address.
[ 1147.137720] usb 5-1: device not accepting address 4, error -71
[ 1147.246644] usb 5-1: new high-speed USB device number 5 using xhci-hcd
[ 1147.253336] usb 5-1: Device not responding to setup address.
[ 1147.459786] usb 5-1: Device not responding to setup address.
[ 1147.665712] usb 5-1: device not accepting address 5, error -71
[ 1147.671789] usb usb5-port1: unable to enumerate USB device

The log shows that smart phone failed to read device
descriptor, error -71 may be caused by PHY signal problem.

This patch aims to tune USB 2.0 PHY with the following
parameters to support USB HDD, smart phone and some other
potential USB 2.0 devices.

1. Disable the pre-emphasize in chirp state to avoid
   high-speed handshake failure.

2. Bypass ODT auto compensation to enable set max driver
   strength manually. (Bit[42] of usbphy_ctrl register is
   1'b1 for bypass, and Bit[41:37] of usbphy_ctrl register
   is 5'b10000 for max driver strength).

3. Bypass ODT auto refresh, and set the max bias current
   tuning reference. (Bit[57] of usbphy_ctrl register is
   1'b1 for bypass, and Bit[52:50] of usbphy_ctrl register
   is 3b'100  for max bias current tuning reference).

We have done the USB 2.0 compliance test and compatibility test
with this patch, it works well.

BRANCH=gru
BUG=chrome-os-partner:59623
TEST=plug/unplug USB HDD or smart phone in Type-C port,
check if they can be detected successfully.

Change-Id: I275c2236b8e469bfd04e9184d007eb095657225e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7735c514d4
Original-Change-Id: I4e6c10faa1c03af9880a89afe4731a7065eb1e4e
Original-Signed-off-by: William wu <wulf@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/409856
Original-Commit-Ready: Eddie Cai <eddie.cai.rk@gmail.com>
Original-Tested-by: Cindy Han <cindy.han@samsung.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17566
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-11-29 17:44:10 +01:00
..
auron Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
auron_paine Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
beltino Add Haswell Chromeboxes/Chromebase using variant board scheme 2016-11-24 05:23:36 +01:00
butterfly intel sandy/ivy: Improve DIMM replacement detection 2016-11-20 21:24:13 +01:00
chell soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
cosmos Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
cyan google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
daisy Kconfig: Prefix hex defaults with 0x 2016-09-30 23:57:02 +02:00
enguarde google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
eve soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
falco Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
foster Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
gale google/gale: Remove #ifdef of Kconfig bool symbol 2016-10-03 22:53:44 +02:00
glados soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
gru google/gru: Tune USB 2.0 PHY to increase compatibility 2016-11-29 17:44:10 +01:00
guado Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
jecht Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
lars soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
link intel sandy/ivy: Improve DIMM replacement detection 2016-11-20 21:24:13 +01:00
ninja google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan_big google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan_blaze google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
oak google/oak: Add DRAM configuration for Samsung K4E8E324EB 2016-11-29 16:08:01 +01:00
parrot google/parrot: Fix keyboard interrupts, DSDT 2016-11-25 20:50:00 +01:00
peach_pit Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00
peppy Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
purin Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
rambi google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
reef google/pyro: disable unused devices 2016-11-29 17:15:43 +01:00
rikku Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
rotor soc/marvell/mvmap2315: Add DDR driver 2016-09-13 17:03:53 +02:00
samus Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
smaug google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
storm qualcomm/storm: Add required files to enable elog in ramstage 2016-07-28 00:38:25 +02:00
stout intel sandy/ivy: Improve DIMM replacement detection 2016-11-20 21:24:13 +01:00
tidus Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
urara Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
veyron google/veyron*: change .ddrconfig from 14 to 3 2016-11-03 13:53:56 +01:00
veyron_mickey google/veyron*: change .ddrconfig from 14 to 3 2016-11-03 13:53:56 +01:00
veyron_rialto google/veyron_rialto: Add lpddr3-K4E6E304EB-2GB-1CH memory configuration 2016-10-06 21:49:06 +02:00
Kconfig
Kconfig.name