Raul E Rangel 9ea7762e79 mp_init: fix typo ... BUG=none TEST=none Change-Id: Ic2d7bf5f5335894ede98dc7e6cc6a65e4897e487 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>		2018-08-06 01:10:14 +00:00
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16bit	cpu/x86/16bit/entry16.inc: Fix typo in comment	2018-02-15 21:39:38 +00:00
32bit	arch/x86: Relocate GDT in verstage, romstage, and postcar	2018-05-03 04:40:58 +00:00
cache
lapic	cpu/x86/lapic/apic_timer.c: Compile the same code for all stages	2018-08-03 09:13:20 +00:00
mtrr	Correct "MTTR" to "MTRR"	2018-04-11 09:30:57 +00:00
name	cpu/x86/name: Fix undefined behavior	2017-07-03 17:15:28 +00:00
pae	cpu/x86: add limited runtime identity page mapping	2018-04-26 06:55:59 +00:00
smm	smm: Add canary to end of stack and die() if a stack overflow occurs	2018-06-28 09:01:02 +00:00
tsc	src/cpu: Remove unneeded includes	2018-06-01 16:27:00 +00:00
backup_default_smm.c
car.c	arch/x86: Add function to determine if we're currently running from CAR	2017-05-30 22:19:25 +02:00
fpu_enable.inc
Kconfig	cpu/x86: Make SMM stack size configurable	2018-06-14 09:28:45 +00:00
Makefile.inc	cpu/x86: add pae paging module to all stages	2018-04-23 09:17:34 +00:00
mirror_payload.c
mp_init.c	mp_init: fix typo	2018-08-06 01:10:14 +00:00
sipi_vector.S	x86/mtrr: Enable Rd/WrDram mod in AMD fixed MTRRs	2018-02-16 22:38:50 +00:00
sse_enable.inc