coreboot/Documentation
Michael Niewöhner 0a6c62fbbe mb/supermicro: restructure x11ssh-tf to represent a x11 board series
Most of the X11 boards with socket LGA1151 are basically the same boards
with just some minor differences like different NICs (1 GbE, 10 GbE),
number of NICs / PCIe ports etc.

There are about 20 boards that can be added, if there is a community for
testing.

To be able to add more x11 boards easily like x11ssm (see CB:35427) this
restructures the x11ssh tree to represent a "X11 LGA1151 series". There
were multiple suggestions for the structure like grouping by series
(x10, x11, x...), grouping by chipset or by cpu family.

It turned out that there are some "X11 series" boards that are
completely different. Grouping by chipset or cpu family suffers from the
same problem. This is why finally we agreed on grouping by series and
socket ("X11 LGA1151 series").

The structure uses the common baseboard scheme, while there is no "real"
baseboard we know of. By checking images, comparing logs etc. we came to
the conclusion that Supermicro does have some base layout which is only
modified a bit for the different boards.

X11SSH-TF was moved to the variants/ folder with it's gpio.h. As we
expect the other boards to have mostly the same device tree, there is a
common devicetree that gets overridden by each variant's overridetree.

Besides that some very minor modifications happened (formatting, fixing
comments, ...) but not much.

Documentation is reworked in CB:35547

Change-Id: I8dc4240ae042760a845e890b923ad40478bb8e29
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35426
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-26 09:29:25 +00:00
..
_static
acpi Documentation/acpi: Add new document on adding ACPI devices to devicetree 2019-08-29 17:31:24 +00:00
arch
community
contributing
doxygen
drivers
flash_tutorial
getting_started Documentation: minor grammar fixes 2019-09-16 21:17:14 +00:00
gfx
Intel
lib arch/riscv: Enable FIT support 2019-08-08 13:03:59 +00:00
mainboard mb/supermicro: restructure x11ssh-tf to represent a x11 board series 2019-09-26 09:29:25 +00:00
northbridge
releases
RFC
security security/intel: Add TXT infrastructure 2019-09-02 04:52:04 +00:00
soc Documentation/soc/intel/fsp: Add link for external FSP2.1 spec 2019-09-04 10:56:22 +00:00
superio superio/common: Add ssdtgen for generic SuperIOs 2019-09-06 15:31:06 +00:00
technotes
tutorial Documentation: rename "Rookie guide" to "tutorial" 2019-09-16 21:17:33 +00:00
vendorcode Documentation/vendorcode: Add Eltan to vendor index 2019-09-25 12:53:07 +00:00
AMD-S3.txt
beginverbatim.tex
Binary_Extraction.md
cbfs.txt
codeflow.svg
coding_style.md Documentation/coding_style.md: Update line length limit 2019-09-04 10:54:41 +00:00
conf.py
COPYING
coreboot_logo.png
corebootBuildingGuide.tex
distributions.md
Doxyfile.coreboot
Doxyfile.coreboot_simple
endverbatim.tex
gcov.txt
hypertransport.svg
index.md Documentation: rename "Rookie guide" to "tutorial" 2019-09-16 21:17:33 +00:00
mainboard_io_trap_handler_sample.c
Makefile
Makefile.sphinx
payloads.md
POSTCODES
util.md