coreboot/src/include/cpu/intel
Felix Zimmer 9d878fc6c0 soc/intel/xeon_sp: Add support for Emerald Rapids (5th Gen Xeon-SP) CPUs
TEST=build/boot ASRock SPC741D8-2L2T/BCM with Intel Xeon Silver 4514Y to
edk2 and Linux 6.12

Change-Id: Iefe3228dcf3626aa9a72d16a288751af47d526f6
Signed-off-by: Felix Zimmer <felix.zimmer@student.kit.edu>
Co-authored-by: Yussuf Khalil <yussuf.khalil@kit.edu>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
2025-05-21 17:10:46 +00:00
..
cpu_ids.h soc/intel/xeon_sp: Add support for Emerald Rapids (5th Gen Xeon-SP) CPUs 2025-05-21 17:10:46 +00:00
em64t100_save_state.h
em64t101_save_state.h
fsb.h
l2_cache.h
microcode.h
msr.h soc/intel/cannonlake: Let coreboot lock MSR_IA32_DEBUG_INTERFACE 2025-03-10 15:19:26 +00:00
post_codes.h
smm_reloc.h
speedstep.h
turbo.h