coreboot/src/soc
Biao Huang 9d48e1732a google/oak: Initialize the necessary pins
BRANCH=none
BUG=none
TEST=verified on Oak rev2 & rev3

Change-Id: I35776f5bdf54243236afba860ae8e9117a160cde
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b46bd9a079107ab78964f7e39582b3b5c863b559
Original-Change-Id: I6696972d07adbf3da5967f09c1638bb977c10207
Original-Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292673
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/12605
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-03 14:23:25 +01:00
..
broadcom/cygnus arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
imgtec/pistachio tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel intel/skylake: Add ACPI device for audio controller 2015-12-03 14:22:23 +01:00
marvell/bg4cd arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
mediatek/mt8173 google/oak: Initialize the necessary pins 2015-12-03 14:23:25 +01:00
nvidia arm64: tegra132: tegra210: Remove old arm64/stage_entry.S 2015-11-17 21:31:20 +01:00
qualcomm/ipq806x cbfs_spi: enable CBFS access in early romstage 2015-12-03 14:17:04 +01:00
rockchip/rk3288 google/veyron*: Pulse the i2c clock once if sda was low 2015-11-18 16:29:16 +01:00
samsung tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00