coreboot/src/soc
Furquan Shaikh 9cd65cd4b5 soc/intel/apollolake: Get rid of cnvi.asl
There is no need to add a special cnvi.asl file for the CNVi
device. This can be handled by drivers/intel/wifi just like a PCIe
WiFi device. This change gets rid of the cnvi.asl file and its usage
in southbridge.asl file.

BUG=b:112371978

Change-Id: I0b798cdd430768730b7ada61ca4cb1f63c2a4229
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-08-12 17:58:37 +00:00
..
amd soc/amd/stoneyridge: Prevent reboot in romstage 2018-08-08 21:52:26 +00:00
broadcom src: Fix typo 2018-08-10 21:25:53 +00:00
cavium soc/cavium/cn81xx: Fix minor things 2018-08-10 23:24:56 +00:00
imgtec soc/imgtec/pistachio: Get rid of device_t 2018-06-04 09:18:19 +00:00
intel soc/intel/apollolake: Get rid of cnvi.asl 2018-08-12 17:58:37 +00:00
lowrisc riscv: add support for modifying compiler options 2018-07-17 18:09:43 +00:00
mediatek drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
nvidia arm64: Remove set_cntfrq() function 2018-08-10 04:16:06 +00:00
qualcomm drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
rockchip drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
samsung src: Fix typo 2018-08-10 21:25:53 +00:00
sifive sifive/fu540: add empty sdram init and size functions 2018-07-18 07:54:54 +00:00
ucb riscv: add support for modifying compiler options 2018-07-17 18:09:43 +00:00