coreboot/src/soc
Michael Niewöhner 9c19bf090e soc/intel/dnv_ns: enable uCode PM Timer emulation
Denverton-NS supports uCode PM Timer emulation, according to Intel
doc#558579 rev2.2. Thus, enable it.

Change-Id: I21f55816da9f5e240fdf01a0e92b67b09ef38599
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-10-16 09:29:38 +00:00
..
amd soc/amd/common: move configure_espi_with_mb_hook implementation 2021-10-15 20:05:02 +00:00
cavium src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
example src: Introduce ARCH_ALL_STAGES_X86 2021-07-02 08:19:10 +00:00
intel soc/intel/dnv_ns: enable uCode PM Timer emulation 2021-10-16 09:29:38 +00:00
mediatek soc/mediatek/mt8192: add tracker dump 2021-10-13 13:58:01 +00:00
nvidia src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
qualcomm soc/qualcomm/sc7280: Enable compression of SHRM 2021-10-15 15:38:34 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti soc/ti/am335x/mmc.c: Fix memset length argument 2021-04-04 09:58:26 +00:00
ucb