coreboot/src/soc/amd
Felix Held 9bfbcd2127 soc/amd/common/block/include/spi: update fch_spi_early_init description
commit 90ac882a32 (soc/amd/common/block/
spi: introduce SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST) introduced a Kconfig
option to enable/disable the 4DW burst support in the SPI flash data
prefetcher, but missed to update the documentation above the
fch_spi_early_init prototype, so update the outdated documentation now.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I07c4b0b02251da63d34a172e2636894e99845d6b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-12-08 13:43:53 +00:00
..
cezanne soc/amd/cezanne: Enable secure counters 2021-12-03 15:28:47 +00:00
common soc/amd/common/block/include/spi: update fch_spi_early_init description 2021-12-08 13:43:53 +00:00
picasso soc/amd: use KiB and MiB definitions 2021-12-08 00:30:07 +00:00
stoneyridge soc/amd/stoneyridge/psp: move soc_get_mbox_address to common psp_gen1 2021-11-30 21:56:00 +00:00
Kconfig