Felix Held e2f5fb2549 vc/amd/fsp/picasso: document requirements for DXIO PCIe port assignments ... Also document the maximum nuber of lanes for the different platforms. Change-Id: I52356d4bbb407ee8a36fce18ad94d73f39c01345 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44069 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-08-02 16:45:22 +00:00
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amd	vc/amd/fsp/picasso: document requirements for DXIO PCIe port assignments	2020-08-02 16:45:22 +00:00
cavium	vc/cavium: Fix up license headers	2020-07-28 10:54:58 +00:00
eltan	Kconfig: Escape variable to accommodate new Kconfig versions	2020-06-19 15:29:04 +00:00
google	ACPI: Drop typedef global_nvs_t	2020-06-30 09:19:10 +00:00
intel	soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fields	2020-07-23 08:46:14 +00:00
siemens	src: Fix up ##-commented SPDX headers	2020-06-01 17:01:13 +00:00
Makefile.inc	vendorcode/eltan: Add vendor code for measured and verified boot	2019-06-04 10:41:53 +00:00