Brandon Breitenstein 275b13fe30 UPSTREAM: vendorcode/intel/fsp: Update UPD headers for FSP 157_10 ... These header files contain a few new UPDs. The EnableS3Heci2 UPD will be used to save ~100ms from the S3 resume time on Apollolake chrome platforms. BUG=chrome-os-partner:58121 BRANCH=none TEST=built coreboot for reef and verified no regressions Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/16869 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Change-Id: I1f324d00237c7150697800258a2f7b7eed856417 Reviewed-on: https://chromium-review.googlesource.com/396165 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-10-11 14:32:03 -07:00
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amd	UPSTREAM: vendorcode/amd/pi/Kconfig: update AGESA_BINARY_PI_LOCATION to hex	2016-10-04 00:32:43 -07:00
google	UPSTREAM: Kconfig: Update default hex values to start with 0x	2016-10-04 00:32:40 -07:00
intel	UPSTREAM: vendorcode/intel/fsp: Update UPD headers for FSP 157_10	2016-10-11 14:32:03 -07:00
siemens	UPSTREAM: intel/i210: Change API for function mainboard_get_mac_address()	2016-07-07 01:09:39 -07:00
Makefile.inc	vendorcode/siemens: Add hwilib for Siemens specific info struct	2016-04-28 08:15:47 +02:00