Nico Huber 9995418166 soc/intel: Replace UART_BASE() and friends with a Kconfig ... Re-add the Kconfig CONSOLE_UART_BASE_ADDRESS. It was lost by accident on APL at least. It is used outside of soc/intel/ scope, e.g. to con- figure SeaBIOS. As we only ever configure a single UART for the coreboot console, we don't need different addresses for each possible UART. Which saves us a lot of code. Change-Id: I28e1d98aa37a6acb57b98b8882fc4fa131d5d309 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33098 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>		2019-06-03 15:23:49 +00:00
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amd	soc/amd/stoneyridge: Fix alignment in iomap.h	2019-06-03 13:35:30 +00:00
cavium	soc/cavium/common/bootblock: Remove unused variables	2019-04-25 15:55:27 +00:00
imgtec
intel	soc/intel: Replace UART_BASE() and friends with a Kconfig	2019-06-03 15:23:49 +00:00
mediatek	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
nvidia	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
qualcomm	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
rockchip	soc/rockchip/rk3288: Disable bootblock console	2019-05-30 03:46:20 +00:00
samsung	Fix code that would trip -Wtype-limits	2019-05-06 10:32:15 +00:00
sifive
ucb