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coreboot/src/mainboard/google
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Brandon Breitenstein 228d0e5078 mb/google/volteer: Only enable TBT root ports if USB4 is supported 
TBT ports should be disabled if the DB is a USB3 DB. It is assumed if
the DB doesn't support USB4 the platform as a whole should only be USB3
capable and TBT functionality on both ports should not be enabled.

BUG=NONE
BRANCH=NONE
TEST=Built coreboot and verified that TBT was disabled on platform with
USB3 DB and enabled on platform with USB4/TBT DB

Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-08-14 16:03:03 +00:00
..
asurada mb/google/asurada: Add new MT8192 mainboard "Asurada" 2020-08-13 05:34:50 +00:00
auron broadwell: Factor out PIRQ routing from devicetree 2020-07-28 08:52:42 +00:00
beltino lynxpoint: Factor out PIRQ routing from devicetree 2020-07-28 08:52:37 +00:00
butterfly sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE 2020-07-20 17:04:46 +00:00
cheza
cyan src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
daisy src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
dedede mb/google/dedede: Add a board specific reset 2020-08-14 15:14:08 +00:00
deltaur soc/intel/skylake: Enable SMBus depending on devicetree configuration 2020-07-29 20:47:56 +00:00
drallion soc/intel/cnl: Set Heci1Disable depending on devicetree config 2020-08-07 20:35:29 +00:00
eve soc/intel/skylake: Enable CIO depending on devicetree configuration 2020-08-08 16:32:41 +00:00
fizz soc/intel/skylake: Enable CIO depending on devicetree configuration 2020-08-08 16:32:41 +00:00
foster
gale src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
glados soc/intel/skylake: Enable CIO depending on devicetree configuration 2020-08-08 16:32:41 +00:00
gru
hatch soc/intel/cnl: Set Heci1Disable depending on devicetree config 2020-08-07 20:35:29 +00:00
jecht broadwell: Factor out PIRQ routing from devicetree 2020-07-28 08:52:42 +00:00
kahlee mainboard: Drop optional and empty ACPI \_BFS methods 2020-07-15 08:33:43 +00:00
kukui mb/google/kukui: revise per-device memory mapping table 2020-08-12 02:54:28 +00:00
link sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE 2020-07-20 17:04:46 +00:00
mistral
nyan
nyan_big
nyan_blaze
oak mb/google/oak: Add new DRAM modules for oak 2020-07-15 01:55:03 +00:00
octopus mb/google/octopus/variants/casta: Disable xHCI compliance mode 2020-08-14 06:55:58 +00:00
parrot sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE 2020-07-20 17:04:46 +00:00
peach_pit src: Use space after 'if', 'for' 2020-08-05 11:37:00 +00:00
poppy soc/intel/skylake: Enable CIO depending on devicetree configuration 2020-08-08 16:32:41 +00:00
rambi baytrail mainboards: Clean up mainboard.c 2020-08-05 07:05:33 +00:00
reef
sarien soc/intel/cnl: Set Heci1Disable depending on devicetree config 2020-08-07 20:35:29 +00:00
slippy lynxpoint: Factor out PIRQ routing from devicetree 2020-07-28 08:52:37 +00:00
smaug
storm
stout sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE 2020-07-20 17:04:46 +00:00
trogdor google/trogdor: Remove write_protect_state 2020-07-20 20:53:21 +00:00
veyron
veyron_mickey
veyron_rialto
volteer mb/google/volteer: Only enable TBT root ports if USB4 is supported 2020-08-14 16:03:03 +00:00
zork mb/google/zork: Switch to using FW_CONFIG instead of SKU_ID 2020-08-13 22:59:46 +00:00
Kconfig
Kconfig.name