coreboot/src/vendorcode/amd
Joe Moore 159cd3f421 vc/amd/agesa: Fix out of bounds read
ByteLane is used unitialized from prior for statement,
creating a potential out-of-bound read of RxOrig[MaxByteLanes].
PassTestRxEnDly[MaxByteLanes] never appears as rvalue; all for
loops have ByteLane < MaxByteLanes exit condition.

Change-Id: Icd18a146aba6b6120d37518d8c40c7efbc05afa3
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1241804
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
2020-01-13 11:22:40 +00:00
..
agesa vc/amd/agesa: Fix out of bounds read 2020-01-13 11:22:40 +00:00
cimx vc/amd/cimx/sb800: Remove old strict-aliasing workaround 2019-08-20 15:38:26 +00:00
fsp/picasso vc/amd/fsp: Add UPD header files for picasso 2019-10-20 17:48:40 +00:00
include
pi vc/amd/pi/00670F00: Fix typo in phony target declaration 2020-01-05 23:54:58 +00:00
Kconfig binaryPI: Drop BINARYPI_LEGACY_WRAPPER support 2019-11-27 10:37:50 +00:00
Makefile.inc