coreboot/src/soc
Rex-BC Chen 978930e860 soc/mediatek/mt8186: Update PWRAP arbiter enable bit
There is no wakeup source when we test function of suspend and resume.
The root cause is that the monitor enable bit of PWRAP is not configured
correctly.

BUG=b:213255218, b:214978483
TEST=receive wakeup source from MT6366 successfully

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I324d18fa5d3cd745c35fcf0f207e1b444b5e898b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61330
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-26 02:56:05 +00:00
..
amd soc/amd/common: Don't reserve VERSTAGE region when using PSP verstage 2022-01-26 01:27:17 +00:00
cavium Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
example Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
intel soc/intel/ehl: Add Kconfig option to disable reset on TCO expiration 2022-01-25 16:15:30 +00:00
mediatek soc/mediatek/mt8186: Update PWRAP arbiter enable bit 2022-01-26 02:56:05 +00:00
nvidia soc/nvidia,qualcomm: Fix indirect includes 2021-11-09 00:13:25 +00:00
qualcomm sc7180: Update video mode active horizontal/vertical/total calculations 2022-01-12 17:35:21 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti
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