Rex-BC Chen f371a78d90 soc/medaitek/mt8195: adjust USB phy shift value ... There is a design issue of bit shift which will drop a bit for USB3 phy on MT8195. Therefore, we add this patch to set USB phy registers from value of efuse. BUG=b:211528577 TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Tianping Fang <tianping.fang@mediatek.corp-partner.google.com> Tested-by: Tianping Fang <tianping.fang@mediatek.corp-partner.google.com> Change-Id: I43cb6c1c795dd181d6eba7f3bc52e4eb1a602081 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60312 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-12-26 10:05:22 +00:00
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amd	soc/amd/cezanne: Correct S0i3 verstage softfuse bit	2021-12-20 17:52:50 +00:00
cavium	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
example	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
intel	soc/intel/{skl,cnl}: Guard USB macro parameters	2021-12-26 10:03:41 +00:00
mediatek	soc/medaitek/mt8195: adjust USB phy shift value	2021-12-26 10:05:22 +00:00
nvidia	soc/nvidia,qualcomm: Fix indirect includes	2021-11-09 00:13:25 +00:00
qualcomm	sc7280: Add support for USB	2021-11-29 23:44:14 +00:00
rockchip	mipi: Make panel init callback work directly on DSI transaction types	2021-09-11 01:42:47 +00:00
samsung	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
sifive	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
ti	soc/ti/am335x/mmc.c: Fix memset length argument	2021-04-04 09:58:26 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00