coreboot/src
Subrata Banik 964a57c592 UPSTREAM: soc/intel/apollolake: Clean up code by using common CAR init
This patch currently contains common CAR initialization
required in bootblock phase along with common MSR header -
1. Use SOC_INTEL_COMMON_BLOCK_CAR to have common CAR initialization
and CAR teardown.
2. Use common MSR header "intelblocks/msr.h" inside soc/cpu.h

BUG=none
BRANCH=none
TEST=none

Change-Id: I24e83349bc89c2793f1a3376fdf7796d7d641800
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fc4c7d8320
Original-Change-Id: I67f909f50a24f009b3e35388665251be1dde40f7
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18555
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/462949
2017-03-30 05:30:03 -07:00
..
acpi UPSTREAM: src/acpi: Capitalize ACPI and SATA 2016-08-04 23:37:57 -07:00
arch UPSTREAM: Remove libverstage as separate library and source file class 2017-03-29 13:43:09 -07:00
commonlib UPSTREAM: commonlib: Wrap lines at 80 columns 2017-03-14 07:25:36 -07:00
console UPSTREAM: console: Enable do_printk_va_list for VBOOT 2017-01-05 11:00:16 -08:00
cpu UPSTREAM: AGESA: Fork for new cache-as-ram init code 2017-03-30 05:29:58 -07:00
device UPSTREAM: device/dram/ddr2: Add common ddr2 spd decoder 2017-03-10 10:54:48 -08:00
drivers UPSTREAM: soc/intel/common/block: Add cache as ram init and teardown code 2017-03-30 05:30:02 -07:00
ec UPSTREAM: vboot: Move remaining features out of vendorcode/google/chromeos 2017-03-29 13:43:08 -07:00
include UPSTREAM: vboot: Move remaining features out of vendorcode/google/chromeos 2017-03-29 13:43:08 -07:00
lib UPSTREAM: Remove libverstage as separate library and source file class 2017-03-29 13:43:09 -07:00
mainboard UPSTREAM: lenovo/g505s: Switch away from AGESA_LEGACY 2017-03-30 05:30:02 -07:00
northbridge UPSTREAM: AGESA: Introduce AGESA_LEGACY and its counterpart 2017-03-30 05:29:58 -07:00
soc UPSTREAM: soc/intel/apollolake: Clean up code by using common CAR init 2017-03-30 05:30:03 -07:00
southbridge UPSTREAM: southbridge/intel/i82801gx: Fix problems found by checkpatch.pl 2017-03-23 08:22:33 -07:00
superio UPSTREAM: superio/fintek: Add support for Fintek F71808A 2017-03-30 05:29:57 -07:00
vboot UPSTREAM: Remove libverstage as separate library and source file class 2017-03-29 13:43:09 -07:00
vendorcode UPSTREAM: vboot: Move remaining features out of vendorcode/google/chromeos 2017-03-29 13:43:08 -07:00
Kconfig UPSTREAM: GDB_WAIT: Clarify Kconfig description 2017-03-16 00:11:36 -07:00