Frans Hendriks 9622024a95 soc/intel/braswell/linclude/soc/device_nvs.h: Fix typo ... Use 'BAR 1' for the bar1 structure fields. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I1d1278f549fc8a2f3e743e2e2019d3e5f7005614 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/30277 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>		2018-12-19 05:50:48 +00:00
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apollolake	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
baytrail	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
braswell	soc/intel/braswell/linclude/soc/device_nvs.h: Fix typo	2018-12-19 05:50:48 +00:00
broadwell	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
cannonlake	soc/intel/cannonlake: Auto turn on HDA controller	2018-12-19 05:32:34 +00:00
common	soc/intel/common: Add support for GPIO group pad base	2018-12-14 18:30:15 +00:00
denverton_ns	cpu/intel/common: Use a common acpi/cpu.asl file	2018-11-30 22:02:35 +00:00
fsp_baytrail	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
fsp_broadwell_de	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
icelake	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
quark	soc: Remove useless include <device/pci_ids.h>	2018-12-19 05:20:49 +00:00
skylake	soc/intel/skylake: Generate DMAR tables for FSP 1.1 boards	2018-12-19 05:34:59 +00:00
Kconfig	src/cpu: Remove dead sourced lines	2018-11-15 10:25:20 +00:00