coreboot/src/soc
Karthikeyan Ramasubramanian 3167fb70f8 soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes
When CBFS verification is enabled, add amdfw_a/b.rom at offset 128 bytes
to account for CBFS file header with hash attribute. When CBFS
verification is disabled, add amdfw_a/b.rom at offset 64 bytes to
account for CBFS file header without hash attribute.

BUG=None
TEST=Build Skyrim, Myst BIOS images with and without CBFS verification
enabled.

Change-Id: Ic374ac41df0c8fb8ce59488881ce5846e9058915
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78425
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
2023-10-20 19:32:43 +00:00
..
amd soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes 2023-10-20 19:32:43 +00:00
cavium soc/cavium/cn81xx/bootblock_custom.S: Specify arch 2023-10-20 14:30:54 +00:00
example/min86 soc: Remove SOC_SPECIFIC_OPTIONS 2023-08-21 23:45:43 +00:00
intel soc/intel/meteorlake: Set build time physical address reserved bits 2023-10-20 17:51:52 +00:00
mediatek device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
nvidia memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
qualcomm device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
rockchip memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
samsung memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
sifive/fu540 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
ti
ucb/riscv