Thaminda Edirisooriya 95ba4c87f5 riscv-trap-handling: Add implementation for trap calls in riscv ... RISCV requires the bios/bootloader to set up an interface by which it can get information about memory, talk to host devices, etc. Put implementation for spike in src/mainboard/emulation/spike-riscv/spike_util.c, and src/arch/riscv/trap_handler.c Change-Id: Ie1d5f361595e48fa6cc1fac25485ad623ecdc717 Signed-off-by: Thaminda Edirisooriya <thaminda@google.com> Reviewed-on: http://review.coreboot.org/11368 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2015-09-10 17:26:38 +00:00
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arm	linking: add and use LDFLAGS_common	2015-09-09 19:35:54 +00:00
arm64	linking: add and use LDFLAGS_common	2015-09-09 19:35:54 +00:00
mips	linking: add and use LDFLAGS_common	2015-09-09 19:35:54 +00:00
riscv	riscv-trap-handling: Add implementation for trap calls in riscv	2015-09-10 17:26:38 +00:00
x86	x86: link ramstage the same way regardless of RELOCATABLE_RAMSTAGE	2015-09-09 19:36:08 +00:00