Angel Pons 94b0c791a0 sb/intel/i82801dx/fadt.c: Use ACPI_ADDRESS_SPACE_IO ... Tested with BUILD_TIMELESS=1, AOpen DXPL Plus-U remains identical. Change-Id: I80ec4d0d6a8ec0dc02b377cfa3f3b5f0362dbb6c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>		2020-07-20 13:33:23 +00:00
..
acpi	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
arch	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
commonlib	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
console	console: Update for vboot before bootblock	2020-06-15 22:07:12 +00:00
cpu	cpu/intel/model_1067x: Drop <cpu/x86/mp.h> include	2020-07-14 16:15:09 +00:00
device	device/xhci: Add helper method to iterate over xhci_supported_protocl	2020-07-12 17:01:24 +00:00
drivers	drivers/intel/dptf: Add missing scope operator around TSR options	2020-07-18 16:04:51 +00:00
ec	ec/google/chromeec: Fix oversights in ec_dptf_helpers	2020-07-18 16:05:33 +00:00
include	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
lib	src: Remove unused 'include <types.h>'	2020-07-14 16:10:17 +00:00
mainboard	mb/google/puff: update USB3 gen2 parameters	2020-07-20 12:37:19 +00:00
northbridge	src: Remove unused 'include <cpu/x86/msr.h>'	2020-07-14 16:14:09 +00:00
security	security/vboot: ensure that NVMEM is saved on every kernel space write	2020-07-15 08:42:11 +00:00
soc	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
southbridge	sb/intel/i82801dx/fadt.c: Use ACPI_ADDRESS_SPACE_IO	2020-07-20 13:33:23 +00:00
superio	sio/nuvoton/common/early_serial.c: Guard serial enable	2020-07-19 18:18:12 +00:00
vendorcode	vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3274	2020-07-20 03:59:46 +00:00
Kconfig	arch/x86: Remove RELOCATABLE_RAMSTAGE	2020-07-06 06:17:47 +00:00