coreboot/src
Wim Vervoorn 944fdc4771 vendorcode/eltan/security: Use custom hash for little endian only
Only use the custom hash routine when we need little endian.

Rename the function as well as it is little endian only now.

BUG=N/A
TEST=tested on fbg1701 board.

Change-Id: I037fa38c5961dab7a81e752c1685da2dc6b33d12
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
2019-11-04 11:30:17 +00:00
..
acpi
arch arch/arm64: Pass cbmem_top to ramstage via calling argument 2019-11-03 11:19:24 +00:00
commonlib commonlib/helpers: Add alloca() macro 2019-10-30 08:20:39 +00:00
console console/kconfig: Move ONBOARD_VGA_IS_PRIMARY to 'devices' 2019-11-01 11:58:40 +00:00
cpu cpu/x86/mtrr/xip_cache.c: Fix inconsistent message 2019-11-03 20:48:18 +00:00
device console/kconfig: Move ONBOARD_VGA_IS_PRIMARY to 'devices' 2019-11-01 11:58:40 +00:00
drivers cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE 2019-11-03 06:15:35 +00:00
ec ec/google/chromeec: Add EC driver support for software sync 2019-10-31 10:36:47 +00:00
include cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE 2019-11-03 06:15:35 +00:00
lib boot_state: Reduce precision of reported times 2019-11-03 06:17:20 +00:00
mainboard mb/facebook/fbg1701: Add logo to the menu 2019-11-04 11:30:06 +00:00
northbridge arch/x86: Use the stage argument to implement cbmem_top 2019-11-03 11:18:31 +00:00
security src/[northbridge,security]: change "unsigned" to "unsigned int" 2019-10-27 18:12:50 +00:00
soc soc/intel/icelake: Make use of "all-y" 2019-11-04 08:20:39 +00:00
southbridge soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi 2019-11-01 11:50:03 +00:00
superio
vendorcode vendorcode/eltan/security: Use custom hash for little endian only 2019-11-04 11:30:17 +00:00
Kconfig src/Kconfig: Drop unused HAVE_POSTCAR 2019-11-01 11:58:59 +00:00