Zheng Bao 944d00b28c soc/amd/picasso: Use readelf to find bootblock size and location ... The Picasso build describes the DRAM region where the PSP places our bootblock. Rather than relying on Kconfig values, make the build more robust by using the actual size and target base address from the boot block's ELF file. Sample output of "readelf -l bootblock.elf" is: ------------------ Elf file type is EXEC (Executable file) Entry point 0x203fff0 There is 1 program header, starting at offset 52 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x02030000 0x02030000 0x10000 0x10000 RWE 0x1000 Section to Segment mapping: Segment Sections... 00 .text .data .bss .reset ------------------ We can extract the information from here. BUG=b:154957411 TEST=Build & boot on mandolin Change-Id: I5a26047726f897c57325387cb304fddbc73f6504 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46092 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-10-20 12:29:32 +00:00
..
amd	soc/amd/picasso: Use readelf to find bootblock size and location	2020-10-20 12:29:32 +00:00
cavium	soc/cavium: Drop unneeded empty lines	2020-09-22 17:14:49 +00:00
intel	soc/intel/cnl: lock AES-NI feature if selected	2020-10-19 21:02:59 +00:00
mediatek	soc/mediatek/mt8192: Do dram fast calibration	2020-10-20 06:58:48 +00:00
nvidia	soc/nvidia: Drop unneeded empty lines	2020-09-22 17:14:59 +00:00
qualcomm	trogdor/sc7180: Clarify USE_QC_BLOBS requirements	2020-10-17 00:29:17 +00:00
rockchip	soc/rockchip/rk3288/include/soc/display.h: Add missing includes	2020-10-19 07:12:07 +00:00
samsung	src/soc/samsung: Move common headers to "common/include/soc"	2020-10-19 07:11:32 +00:00
sifive	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ti	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00