coreboot/src
Julius Werner e9879c0fbd CBFS: Automate ROM image layout and remove hardcoded offsets
Non-x86 boards currently need to hardcode the position of their CBFS
master header in a Kconfig. This is very brittle because it is usually
put in between the bootblock and the first CBFS entry, without any
checks to guarantee that it won't overlap either of those. It is not fun
to debug random failures that move and disappear with tiny alignment
changes because someone decided to write "ORBC1112" over some part of
your data section (in a way that is not visible in the symbolized .elf
binaries, only in the final image). This patch seeks to prevent those
issues and reduce the need for manual configuration by making the image
layout a completely automated part of cbfstool.

Since automated placement of the CBFS header means we can no longer
hardcode its position into coreboot, this patch takes the existing x86
solution of placing a pointer to the header at the very end of the
CBFS-managed section of the ROM and generalizes it to all architectures.
This is now even possible with the read-only/read-write split in
ChromeOS, since coreboot knows how large that section is from the
CBFS_SIZE Kconfig (which is by default equal to ROM_SIZE, but can be
changed on systems that place other data next to coreboot/CBFS in ROM).

Also adds a feature to cbfstool that makes the -B (bootblock file name)
argument on image creation optional, since we have recently found valid
use cases for CBFS images that are not the first boot medium of the
device (instead opened by an earlier bootloader that can already
interpret CBFS) and therefore don't really need a bootblock.

BRANCH=None
BUG=None
TEST=Built and booted on Veyron_Pinky, Nyan_Blaze and Falco.

Change-Id: Ifcc755326832755cfbccd6f0a12104cba28a20af
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229975
2014-12-03 06:09:54 +00:00
..
arch CBFS: Automate ROM image layout and remove hardcoded offsets 2014-12-03 06:09:54 +00:00
console Avoid 64bit math on MIPS platforms 2014-12-02 01:57:08 +00:00
cpu CBFS: Automate ROM image layout and remove hardcoded offsets 2014-12-03 06:09:54 +00:00
device Broadwell FSP: Add new finalize functions for devices and chips 2014-11-20 20:49:36 +00:00
drivers spi: support controllers with limited transfer size capabilities 2014-12-03 05:03:05 +00:00
ec chromeec: Add wakeup delay after SPI /CS assertion 2014-10-01 06:53:27 +00:00
include CBFS: Automate ROM image layout and remove hardcoded offsets 2014-12-03 06:09:54 +00:00
lib CBFS: Automate ROM image layout and remove hardcoded offsets 2014-12-03 06:09:54 +00:00
mainboard CBFS: Automate ROM image layout and remove hardcoded offsets 2014-12-03 06:09:54 +00:00
northbridge Makefile: Preprocess linker scripts and other general improvements 2014-10-02 07:02:10 +00:00
soc CBFS: Automate ROM image layout and remove hardcoded offsets 2014-12-03 06:09:54 +00:00
southbridge timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
superio superio: ite8772f: Exit extemp busy state 2014-09-27 07:09:25 +00:00
vendorcode CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool 2014-12-03 06:09:40 +00:00
Kconfig CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool 2014-12-03 06:09:40 +00:00