coreboot/src
Evgeny Zinoviev 920d2b77f2 cpu/intel/206ax/acpi.c: Fix get_cores_per_package
Current implementation uses CPUID 0Bh function that returns the number
of logical cores of requested level. The problem with this approach is
that this value doesn't change when HyperThreading is disabled (it's in
the Intel docs), so it breaks generate_cpu_entries().

- Use MSR 0x35 instead, which returns the correct number of logical
  processors with and without HT.

- Rename the function to get_logical_cores_per_package, which is more
  accurate.

Tested on ThinkPad X220 with and without HT.

Related to CB:29669.

Change-Id: Ib32c2d40408cfa42ca43ab42ed661c168e579ada
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-09-28 09:24:11 +00:00
..
acpi acpi: Add SSDT pstate helper functions 2020-09-22 16:06:34 +00:00
arch arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
commonlib
console
cpu cpu/intel/206ax/acpi.c: Fix get_cores_per_package 2020-09-28 09:24:11 +00:00
device
drivers
ec ec/google/chromeec: set DPTC power parameter at OS startup 2020-09-23 06:14:22 +00:00
include soc/amd/picasso: Generate ACPI pstate and cstate objects in cb 2020-09-25 22:49:56 +00:00
lib lib/Makefile.inc: fix name of config string 2020-09-26 19:33:49 +00:00
mainboard mb/google/zork: update telemetry settings for dirinboz 2020-09-28 09:23:27 +00:00
northbridge ironlake: Fix compilation on x86_64 2020-09-26 17:31:08 +00:00
security
soc util: Add new memory part for zork boards 2020-09-28 06:11:54 +00:00
southbridge sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines 2020-09-27 22:46:41 +00:00
superio
vendorcode vc/amd/fsp/picasso: Update to UPD 1.0.1.3 2020-09-25 23:22:50 +00:00
Kconfig