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Angel Pons 91fe658714 drivers/option: Add forms in cbtables
Introduce a mechanism so that coreboot can provide a list of options to
post-coreboot code. The options are grouped together into forms and
have a meaning name and optional help text. This can be used to let
payloads know which options should be displayed in a setup menu,
for instance. Although this system was written to be used with edk2,
it has been designed with flexibility in mind so that other payloads
can also make use of this mechanism. The system currently lacks a way
to describe where to find option values.

This information is stored in a set of data structures specifically
created for this purpose. This format is known as CFR, which means
"coreboot forms representation" or "cursed forms representation".
Although the "forms representation" is borrowed from UEFI, CFR can
be used in non-UEFI scenarios as well.

The data structures are implemented as an extension of cbtables records
to support nesting. It should not break backwards compatibility because
the CFR root record (LB_TAG_CFR_ROOT) size includes all of its children
records. The concept of record nesting is borrowed from the records for
CMOS options. It is not possible to reuse the CMOS records because they
are too closely coupled with CMOS options; using these structures would
needlessly restrict more capable backends to what can be done with CMOS
options, which is undesired.

Because CFR supports variable-length components, directly transforming
options into CFR structures is not a trivial process. Furthermore, CFR
structures need to be written in one go. Because of this, abstractions
exist to generate CFR structures from a set of "setup menu" structures
that are coreboot-specific and could be integrated with the devicetree
at some point. Note that `struct sm_object` is a tagged union. This is
used to have lists of options in an array, as building linked lists of
options at runtime is extremely impractical because options would have
to be added at the end of the linked list to maintain option order. To
avoid mistakes defining `struct sm_object` values, helper macros exist
for supported option types. The macros also provide some type checking
as they initialise specific union members.

It should be possible to extend CFR support for more sophisticated
options like fan curve points. Feedback about this is highly
appreciated.

Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74121
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-12-18 18:16:51 +00:00
3rdparty 3rdparty/fsp: Update submodule to upstream master 2024-12-16 21:09:14 +00:00
configs mainboard: Add MiTAC Computing Whitestone-2 (LGA-4677) 2024-12-18 09:07:50 +00:00
Documentation drivers/option: Add forms in cbtables 2024-12-18 18:16:51 +00:00
LICENSES LICENSES: Add LGPL 2.1 license 2024-02-18 01:56:38 +00:00
payloads libpayload: configs: Add new config.featuretest to broaden CI 2024-12-04 22:25:34 +00:00
spd spd/lp5: Add Hynix memory part 2024-11-30 05:03:59 +00:00
src drivers/option: Add forms in cbtables 2024-12-18 18:16:51 +00:00
tests tree: Fix cast an object of type 'nullptr_t' to 'uintptr_t' error 2024-10-29 01:41:41 +00:00
util util/mtkheader: Add GFH header for mt8189 bootblock code 2024-12-18 02:08:42 +00:00
.checkpatch.conf .checkpatch.conf: Set max line length to 96 2024-12-04 07:36:22 +00:00
.clang-format Treewide: Fix incorrect SPDX license strings 2024-02-18 01:55:57 +00:00
.editorconfig .editorconfig: Add indent style & size of 2 spaces for shell 2023-12-20 22:30:33 +00:00
.gitignore .gitignore: Ignore payloads/libpayload/generated/ 2024-01-11 14:39:52 +00:00
.gitmodules 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER 2024-09-06 13:55:50 +00:00
.gitreview .gitreview: Update default branch from master to main 2023-12-23 16:44:31 +00:00
.mailmap .mailmap: Add a .mailmap file for git 2022-03-08 18:53:47 +00:00
AUTHORS AUTHORS: Remove whitespaces at end of line 2024-05-24 11:06:45 +00:00
COPYING
gnat.adc drivers/intel/gma: Allow SPARK function with side effects 2024-03-01 18:46:30 +00:00
MAINTAINERS MAINTAINERS: Add Yuchi and Vasiliy for Intel Atom Snow Ridge SoC 2024-12-04 11:06:57 +00:00
Makefile Makefile: Fix no-op incremental build 2024-09-28 20:46:07 +00:00
Makefile.mk Makefile.mk: Suppress stack-usage LTO link warning 2024-11-06 04:55:09 +00:00
README.md Documentation: Update internal URL's 2024-01-04 14:22:51 +00:00
toolchain.mk arch/arm64: Use -mno-implicit-float with clang 2024-10-02 09:19:15 +00:00

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary firmware (BIOS/UEFI) found in most computers. coreboot performs the required hardware initialization to configure the system, then passes control to a different executable, referred to in coreboot as the payload. Most often, the primary function of the payload is to boot the operating system (OS).

With the separation of hardware initialization and later boot logic, coreboot is perfect for a wide variety of situations. It can be used for specialized applications that run directly in the firmware, running operating systems from flash, loading custom bootloaders, or implementing firmware standards, like PC BIOS services or UEFI. This flexibility allows coreboot systems to include only the features necessary in the target application, reducing the amount of code and flash space required.

Source code

All source code for coreboot is stored in git. It is downloaded with the command:

git clone https://review.coreboot.org/coreboot.git.

Code reviews are done in the project's Gerrit instance.

The code may be browsed via coreboot's Gitiles instance.

The coreboot project also maintains a mirror of the project on github. This is read-only, as coreboot does not accept github pull requests, but allows browsing and downloading the coreboot source.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://doc.coreboot.org/payloads.html for a list of some of coreboot's supported payloads.

Supported Hardware

The coreboot project supports a wide range of architectures, chipsets, devices, and mainboards. While not all of these are documented, you can find some information in the Architecture-specific documentation or the SOC-specific documentation.

For details about the specific mainboard devices that coreboot supports, please consult the Mainboard-specific documentation or the Board Status pages.

Releases

Releases are currently done by coreboot every quarter. The release archives contain the entire coreboot codebase from the time of the release, along with any external submodules. The submodules containing binaries are separated from the general release archives. All of the packages required to build the coreboot toolchains are also kept at coreboot.org in case the websites change, or those specific packages become unavailable in the future.

All releases are available on the coreboot download page.

Please note that the coreboot releases are best considered as snapshots of the codebase, and do not currently guarantee any sort of extra stability.

Build Requirements and building coreboot

The coreboot build, associated utilities and payloads require many additional tools and packages to build. The actual coreboot binary is typically built using a coreboot-controlled toolchain to provide reproducibility across various platforms. It is also possible, though not recommended, to make it directly with your system toolchain. Operating systems and distributions come with an unknown variety of system tools and utilities installed. Because of this, it isn't reasonable to list all the required packages to do a build, but the documentation lists the requirements for a few different Linux distributions.

To see the list of tools and libraries, along with a list of instructions to get started building coreboot, go to the Starting from scratch tutorial page.

That same page goes through how to use QEMU to boot the build and see the output.

Website and Mailing List

Further details on the project, as well as links to documentation and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://doc.coreboot.org/community/forums.html

Copyrights and Licenses

Uncopyrightable files

There are many files in the coreboot tree that we feel are not copyrightable due to a lack of creative content.

"In order to qualify for copyright protection in the United States, a work must satisfy the originality requirement, which has two parts. The work must have “at least a modicum” of creativity, and it must be the independent creation of its author."

https://guides.lib.umich.edu/copyrightbasics/copyrightability

Similar terms apply to other locations.

These uncopyrightable files include:

  • Empty files or files with only a comment explaining their existence. These may be required to exist as part of the build process but are not needed for the particular project.
  • Configuration files either in binary or text form. Examples would be files such as .vbt files describing graphics configuration, .apcb files containing configuration parameters for AMD firmware binaries, and spd files as binary .spd or text *spd*.hex representing memory chip configuration.
  • Machine-generated files containing version numbers, dates, hash values or other "non-creative" content.

As non-creative content, these files are in the public domain by default. As such, the coreboot project excludes them from the project's general license even though they may be included in a final binary.

If there are questions or concerns about this policy, please get in touch with the coreboot project via the mailing list.

Copyrights

The copyright on coreboot is owned by quite a large number of individual developers and companies. A list of companies and individuals with known copyright claims is present at the top level of the coreboot source tree in the 'AUTHORS' file. Please check the git history of each of the source files for details.

Licenses

Because of the way coreboot began, using a significant amount of source code from the Linux kernel, it's licensed the same way as the Linux Kernel, with GNU General Public License (GPL) Version 2. Individual files are licensed under various licenses, though all are compatible with GPLv2. The resulting coreboot image is licensed under the GPL, version 2. All source files should have an SPDX license identifier at the top for clarification.

Files under coreboot/Documentation/ are licensed under CC-BY 4.0 terms. As an exception, files under Documentation/ with a history older than 2017-05-24 might be under different licenses.

Files in the coreboot/src/commonlib/bsd directory are all licensed with the BSD-3-clause license. Many are also dual-licensed GPL-2.0-only or GPL-2.0-or-later. These files are intended to be shared with libpayload or other BSD licensed projects.

The libpayload project contained in coreboot/payloads/libpayload may be licensed as BSD or GPL, depending on the code pulled in during the build process. All GPL source code should be excluded unless the Kconfig option to include it is set.

The Software Freedom Conservancy

Since 2017, coreboot has been a member of The Software Freedom Conservancy, a nonprofit organization devoted to ethical technology and driving initiatives to make technology more inclusive. The conservancy acts as coreboot's fiscal sponsor and legal advisor.