coreboot/src/soc/intel/common
Duncan Laurie 91da91f5d1 intel/common: Print board ID if enabled
Read and print the board ID if it is enabled in the mainboard.

BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I9d50089242b3a2f461dff2b1039adc8f0347179e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f245854b30c40eda38453c1b0ae5d3b8b18c010f
Original-Change-Id: Ifbd7c2666820ea146dc44fbc42bfe201cb227ff6
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297756
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11577
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-10 09:52:25 +00:00
..
fsp_ramstage.c soc/intel/common/fsp_ramstage.c: Don't die when printing HOB info 2015-08-29 02:38:46 +00:00
gma.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
hda_verb.c Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
hda_verb.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Kconfig soc/intel/common: Add mrc.cache file to CBFS when appropriate 2015-08-29 00:53:11 +00:00
Makefile.inc soc/intel/common: Add mrc.cache file to CBFS when appropriate 2015-08-29 00:53:11 +00:00
memmap.h intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
mrc_cache.c bootstate: remove need for #ifdef ENV_RAMSTAGE 2015-09-04 21:01:58 +00:00
mrc_cache.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
raminit.c fsp raminit: Add romstage_params to soc_memory_init_params 2015-08-29 07:11:34 +00:00
ramstage.h Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
reset.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c intel/common: Print board ID if enabled 2015-09-10 09:52:25 +00:00
romstage.h fsp raminit: Add romstage_params to soc_memory_init_params 2015-08-29 07:11:34 +00:00
stack.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stack.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stage_cache.c intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
util.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
util.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
vbt.c Braswell: Remove GOP from normal boot mode. 2015-07-21 20:07:54 +02:00