coreboot/src/lib
Julius Werner b8fad3d029 arm: libpayload: Add cache coherent DMA memory definition and management
This patch adds a mechanism to set aside a region of cache-coherent
(i.e. usually uncached) virtual memory, which can be used to communicate
with DMA devices without automatic cache snooping (common on ARM)
without the need of explicit flush/invalidation instructions in the
driver code.

This works by setting aside said region in the (board-specific) page
table setup, as exemplary done in this patch for the Snow and Pit
boards. It uses a new mechanism for adding board-specific Coreboot table
entries to describe this region in an entry with the LB_DMA tag.

Libpayload's memory allocator is enhanced to be able to operate on
distinct types/regions of memory. It provides dma_malloc() and
dma_memalign() functions for use in drivers, which by default just
operate on the same heap as their traditional counterparts. However, if
the Coreboot table parsing code finds a CB_DMA section, further requests
through the dma_xxx() functions will return memory from the region
described therein instead.

Change-Id: Ia9c249249e936bbc3eb76e7b4822af2230ffb186
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167155
(cherry picked from commit d142ccdcd9)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6622
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-13 00:04:14 +02:00
..
loaders Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
bootmem.c coreboot: introduce notion of bootmem for memory map at boot 2014-03-03 21:47:27 +01:00
bootmode.c ChromeOS: Remove oprom_is_loaded 2014-05-01 15:39:26 +02:00
cbfs.c coreboot: unify infrastructure for loading payloads 2014-03-03 19:48:02 +01:00
cbfs_core.c cbfs: Check return value of map() for error 2014-08-10 22:28:10 +02:00
cbmem.c lib: Trivial - drop trailing blank lines at EOF 2014-07-08 13:52:15 +02:00
cbmem_console.c console: Fix includes 2014-03-04 15:26:08 +01:00
cbmem_info.c baytrail: snapshot power state in romstage 2014-05-13 16:11:04 +02:00
clog2.c src/lib/clog2.c: Fix style and clarity, remove some cruft 2014-06-20 08:06:51 +02:00
compute_ip_checksum.c
coreboot_table.c arm: libpayload: Add cache coherent DMA memory definition and management 2014-08-13 00:04:14 +02:00
debug.c
delay.c
dynamic_cbmem.c lib/dynamic_cbmem.c: Include cbmem_console.h 2014-03-08 13:06:34 +01:00
edid.c src/lib/edid.c: missing break statement 2014-08-10 08:21:25 +02:00
fallback_boot.c
gcc.c lib: Trivial - drop trailing blank lines at EOF 2014-07-08 13:52:15 +02:00
gcov-glue.c
gcov-io.c
gcov-io.h
gcov-iov.h
generic_dump_spd.c
generic_sdram.c
hardwaremain.c ACPI: Recover type of wakeup in acpi_is_wakeup() 2014-07-03 09:49:26 +02:00
hexdump.c lib/hexdump: Use size_t for length parameter of hexdump32() 2014-05-05 08:59:05 +02:00
jpeg.c
jpeg.h
libgcov.c Fix whitespace leaked into tree 2013-09-17 21:04:35 +02:00
lzma.c
lzmadecode.c load_payload: Use 32-bit accesses to speed up decompression. 2014-02-05 23:04:53 +01:00
lzmadecode.h
Makefile.inc coreboot classes: Add dynamic classes to coreboot 2014-08-11 15:42:20 +02:00
malloc.c
memchr.c
memcmp.c
memcpy.c
memmove.c
memrange.c mtrr: only add prefetchable resources as WRCOMB for VGA devices 2014-02-09 22:08:53 +01:00
memset.c
ramstage_cache.c ramstage_cache: allow ramstage usage add valid helper 2014-05-10 06:31:45 +02:00
ramtest.c
reg_script.c baytrail: add more iosf access functions 2014-05-10 06:31:00 +02:00
rmodule.c rmodules: use rmodtool to create rmodules 2014-03-20 23:55:55 +01:00
rmodule.ld Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
selfboot.c Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
stack.c
thread.c Possible thread stack implementation. 2014-08-07 23:55:15 +02:00
timer_queue.c
timestamp.c SMP: Add arch-agnostic boot_cpu() 2014-02-11 21:55:30 +01:00
trace.c
version.c lib: Trivial - drop trailing blank lines at EOF 2014-07-08 13:52:15 +02:00