coreboot/src/arch
Ionela Voinescu 8fa8f4bdc3 arch/mips: provide proper cache primitives
This provides the opportunity to remove the kludge of disabling caches
altogether in the bootblock.

[pg: originally, this commit also provided automatic cache management
after loading stages, ie. flush dcache, so code ends up in icache. This
is done differently in upstream, so it's left out here]

BUG=chrome-os-partner:34127, chrome-os-partner:31438
TEST=with this fix romstage, ramstage and payload are executed properly
BRANCH=none

Change-Id: I568c68d02b2cd9c1c2c9c1495ba3343c82509ccc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 95ab0f159cabf21fc100f371d451211e7d113761
Original-Change-Id: Iaf90b052073dd355ab9114e8dba9f5ef76188c94
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/232410
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9618
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-13 20:25:21 +02:00
..
arm arm: Add bootblock_mainboard_early_init() for pre-console initialization 2015-04-13 17:21:17 +02:00
arm64 arm64: No need of invalidating cache line for secondary CPU stack 2015-04-10 20:47:52 +02:00
mips arch/mips: provide proper cache primitives 2015-04-13 20:25:21 +02:00
riscv kconfig: drop intermittend forwarder files 2015-04-07 17:40:28 +02:00
x86 x86: Support reset routines in bootblock 2015-04-10 20:28:45 +02:00