coreboot/src
Aaron Durbin 8f89b7c50d UPSTREAM: mainboard/google/reef: indicate dual rank LPDDR4 skus
The 16Gb devices use two ranks per channel within the DRAM module.
However, the density settings are really on a per rank basis so
indicate dual rank with a device density of 8Gb.

BUG=chrome-os-partner:55446

Change-Id: Ib5dba6f9ed248750d68b726996c71def9b75961e
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/15772
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362689
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-07-23 13:05:04 -07:00
..
acpi UPSTREAM: arch/x86: provide common Intel ACPI hardware definitions 2016-07-15 08:39:52 -07:00
arch UPSTREAM: arch/riscv: Enable unaligned load handling 2016-07-19 18:33:29 -07:00
commonlib UPSTREAM: cbmem: share additional time stamps IDs 2016-07-21 11:22:03 -07:00
console UPSTREAM: console/post: be explicit about conditional cmos_post_log() compiling 2016-05-26 03:21:57 -07:00
cpu UPSTREAM: intel car: Unify postcodes 2016-07-23 13:04:57 -07:00
device UPSTREAM: device: i2c: Add support for I2C bus operations 2016-06-10 00:17:46 -07:00
drivers UPSTREAM: drivers/intel/fsp2_0: Split reset handling logic 2016-07-19 18:33:31 -07:00
ec UPSTREAM: ec/google/chromeec: provide common SMI handler helpers 2016-07-15 16:50:24 -07:00
include UPSTREAM: soc/intel/common: Add reset_prepare() for common reset 2016-07-19 18:33:24 -07:00
lib UPSTREAM: tpm2_tlcl: Use signed integer for tpm2_marshal_command return value 2016-07-21 11:21:58 -07:00
mainboard UPSTREAM: mainboard/google/reef: indicate dual rank LPDDR4 skus 2016-07-23 13:05:04 -07:00
northbridge UPSTREAM: nb/intel/x4x: Fix CAS latency detection 2016-07-19 16:31:08 -07:00
soc UPSTREAM: soc/intel/apollolake: add dual rank option to meminit 2016-07-23 13:05:02 -07:00
southbridge UPSTREAM: timestamp: Drop duplicate TS_END_ROMSTAGE entries 2016-07-21 11:22:15 -07:00
superio UPSTREAM: sio/winbond/w83667hg-a: Add pinmux defines for UART B 2016-05-31 12:07:04 -07:00
vendorcode UPSTREAM: soc/intel/quark: Pass in the memory initialization parameters 2016-07-09 01:40:13 -07:00
Kconfig UPSTREAM: Romstage spinlocks require EARLY_CBMEM_INIT 2016-07-11 21:27:20 -07:00