coreboot/src
Aaron Durbin 8e345d4ca2 haswell: lapic timer support
Haswell's BCLK is fised at 100MHz like Sandy/Ivy. Add Haswell's model
to the switch statement.

Change-Id: Ib9e2afc04eba940bfcee92a6ee5402759b21cc45
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2747
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-18 18:50:37 +01:00
..
arch x86 intel: Add Firmware Interface Table support 2013-03-17 22:53:51 +01:00
console Eliminate do_div(). 2013-03-08 23:14:26 +01:00
cpu haswell: lapic timer support 2013-03-18 18:50:37 +01:00
device Google Link: Add remaining code to support native graphics 2013-03-15 20:21:51 +01:00
drivers GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
ec Support ITE IT8518 embedded controller running Quanta's firmware 2013-03-14 04:54:21 +01:00
include lib: add rmodule support 2013-03-18 18:40:34 +01:00
lib lib: add rmodule support 2013-03-18 18:40:34 +01:00
mainboard lynxpoint: Move a bit of generic RCBA into early_pch 2013-03-18 18:49:07 +01:00
northbridge haswell: fix ACPI MCFG table 2013-03-18 17:11:24 +01:00
southbridge lynxpoint: Move a bit of generic RCBA into early_pch 2013-03-18 18:49:07 +01:00
superio Super I/O W83627DHG: Enable UART B by redirecting pins 2013-03-15 17:51:48 +01:00
vendorcode google/snow: rename a file so that it is clear what board it is for 2013-03-16 04:07:35 +01:00
Kconfig lib: add rmodule support 2013-03-18 18:40:34 +01:00